Everything You Know About Via Temperatures is Wrong!
- Via temperatures are not related to via current
- Via temperatures are not related to current density
Douglas Brooks, PhD and Dr. Johannes Adam
Via Temperatures and Current: The common understanding in the electronics industry is that via temperatures, just like trace temperatures, are a function of the current through the via. In fact, the routine design guidelines for via size is to create them with the same conducting cross-sectional area as the traces they are connected to.1 This leads to very inefficient PCB designs, because subsequent designs use far more and larger vias than are necessary, taking up valuable PCB real estate. In a recent book2, Brooks and Adam have shown through thermal simulations and actual experimental test boards, that there is little or no relationship between the current through a via and the via’s temperature. Often all that is needed for a trace is a single via, no matter how large the current is.
To illustrate the point, they designed a simulation3,4, and then an experimental board, around a single 10 mil diameter via design, plated with 1.0 Oz. copper. They set up two different conditions. In the first, they designed a pair of 27 mil wide, 1.5-ounce traces (0.5 Oz foil plated with 1.0 Oz. copper), top and bottom of a 63 mil thick FR4 board, connected by this single via. The 27 mil width was selected because it has approximately the same conducting cross-sectional area as the 10 mil diameter via. They then applied 4.75 Amps to the circuit and measured the resulting temperatures. The trace temperature was 66.0 degrees C, about as expected5, and the via temperature was 64.5 degrees C, 1.5 degrees cooler than the trace!
The second condition was similar except that the trace width was 200 mils, while the via diameter remained the same size as before, 10 mils. This time they applied 8.55 Amps to the circuit. The trace temperature was 40.5 degrees C, again as expected, while the via temperature was 44.5 degrees, higher than the trace temperature but substantially lower than before even though significantly more current was passing through the via. This proves that via temperatures are not related to the current.
“Why Not?” you ask. There are two reasons. First, IPC-2152 showed us for the first time that internal traces have lower temperatures than external traces carrying the same current because the board dielectric is a much better conductor of heat than is the air. Internal traces are surrounded by board dielectric while external traces only have board dielectric at one side. Internal traces are always lower in temperature than equivalent external traces carrying the same current. Vias are surrounded by board dielectric and “look” like internal traces.
Second, if we have larger conductors connected with a small via and pass a large current through it, we would expect the via temperature to increase dramatically. But the via temperature cannot get much higher than the parent trace temperature because the parent traces act as heat sinks for the via. In the big picture, the via length is very small. So the thermal path to the trace “heat sink” is very short. Then, if the parent conducting cross-sectional area is significantly larger than the via’s, the trace becomes an effective heat sink for the via. An analogy is the heat sink we place on microprocessors on computer motherboards. Without the heat sinks the processors would get very hot and fail quickly. With the heat sinks they last indefinitely. The same is true with vias. The via temperature is controlled by the parent trace temperature, not the current.
Via Temperatures and Current Density: Similarly, there is no relationship between via temperatures and current density. Referring to the illustration above, no matter where and how you define current density, there is no relationship between current density and via temperature.
Brooks and Adam ran a series of simulations holding (to the degree practical) via temperature constant while varying trace width and current. The relevant simulation parameters were as follows (conversions () are approximate):
Board thickness: 1.6 mm (63 mils)
Copper thickness: 0.04 mm (1.0 Oz)
Trace length: 32 mm, top and bottom (1.3 in.)
60 mm overall (2.6 in.)
Trace width: Varies; 0.6 to 5.0 mm (24 to 200 mils)
Via diameter: 0.26 mm (10 mils)
Via wall thickness: 0.04 mm (1.0 Oz.)
Via Cross-sectional area 0.02675 mm2
Partial results are shown in Table 1.6 Even though the current through the via varies significantly in each simulation, as do the current densities, the via temperature remains constant in every simulation. Again, there is no relationship between via temperature and current density.
| Trace W | Current | T-Trace | T-Via | J-Trace | J-Via |
| mm | A | oC | oC | A/mm2 | A/mm2 |
| 0.6 | 2.74 | 61.2 | 60.4 | 114.2 | 99.1 |
| 1.0 | 3.57 | 58.6 | 60.5 | 89.3 | 129.1 |
| 2.0 | 5.25 | 56.5 | 60.5 | 65.6 | 189.9 |
| 5.0 | 8.4 | 52.7 | 59.6 | 42.0 | 303.8 |
Table 1
Holding via temperature constant shows that there is no relationship between via temperature and current density.
In fact, it is fairly easy to demonstrate from the IPC curves themselves that there is not a direct relationship between current density and any trace temperature. The black lines in Figure 1 are derived from Figure A-26 on page 42 in IPC-2152. They are for 2.0 Oz, external conductors. The horizontal axis is trace cross-sectional area, the vertical axis is current, and the black curves are constant temperature curves.
Now current density is current divided by cross-sectional area. So current density is a straight line on these axes. Four different values of current density are drawn (in red) on these axes. Every place a red line crosses a black curve represents a different trace current/temperature relationship but with the same current density.
Figure 1
Constant current density lines (red) intersect several different temperature curves on the IPC-2152 charts.
There is simply no relationship between any temperature variable and current density on circuit boards.
Notes:
- See, for example, IPC 2152, “Standard for Determining Current Carrying Capacity in Printed
- Board Design,” 2009, IPC.com. p. 26.
- Douglas Brooks and Johannes Adam, PCB Design Guide to Via and Trace Currents and Temperatures, Artech House, Feb. 2021
- Simulations used TRM (Thermal Risk Management) simulation software for thermally characterizing printed circuit boards. TRM was originally conceived and designed to analyze temperatures across a circuit board, taking into consideration the complete trace layout with optional joule heating as well as various components and their own contributions to heat generation. TRM was written by Dr. Johannes Adam, President, ADAM Research, Leimen, Germany.
- All examples herein come from Chapters 8 and 14 in the book referenced in Note 2.
- Trace temperatures can be estimated from IPC-2152. The reported temperatures here are from the experimental results.
- More complete results are provided in Section 14.9 in the book referenced in Note 2.
