Historically, Dr. Johannes Adam and I (Douglas Brooks) have looked at two sources for guidance here. W. H. Preece developed an equation in 1888 (appropriately known as “Preece’s Equation”) that tried to specify the “fusing current” as a function of conductor cross-sectional area. I. M. Onderdonk developed “Onderdonk’s Equation” that did the same thing (perhaps around 1928) but added an additional variable, time to fusing, into the analysis.

In our book, * PCB Design Guide to Via and Trace Currents and Temperatures *(Note 1), Dr. Adam and I look at both Preece’s Equation and Onderdonk’s Equation as an aid in solving the problem of required trace size, as well as two other approaches, simulation and experimentation. This article uses a specific example to compare the four approaches to see how useful they can be in actual application.

**Preece’s Equation:** In 1888, Sir William Henry Preece was Consulting Engineer (and later Engineer in Chief) for the British General Post Office, which at that time was also responsible for the telegraph system. He was concerned about possible lightning strikes to telegraph lines and how those strikes might travel down the line injuring personnel. He wanted to find a conducting material and size that would perform safely under general operation yet fuse (melt) and protect an operator if there were a lightning strike anywhere along the line. He experimented with a large number of materials by passing current down them and bringing them to just below their fusing (melting) point. He determined that the proper point was reached when the conductor glowed bright red.

He considered a large number of materials and sizes while generating his general equation. If we use the constant he determined for copper and use our US dimensional system, his equation reduces to:

I = 12277*[A^.75] [Eq. 1]

Where I is the fusing current in Amps and A is the conductor cross-sectional area in square inches.

If we assume a 0.5 Oz. PCB trace that is 15 mils wide, this equation predicts a fusing current of 2.14 Amps:

I = 12277 * ((15*0.65*10^{-6})^{.75}) = 2.14 [Eq. 2]

**Onderdonk’s Equation:** Unlike Preece, almost nothing is known about I. M. Onderdonk. When we see his/her equation in print it is offered almost as a given, much like we treat Ohm’s Law. The earliest reference we were able to locate dated to 1928. The 1928 article was written by an engineer (E. R. Stauffacher) at Southern California Edison. At the same time that article was published (coincidence?), SoCal was building a very high voltage transmission line between Los Angeles and Nevada to support the construction of Hoover Dam. The reference seemed to be related to a similar problem that Preece was concerned with. The high voltage line towers were supported by guy wires, which collected dust in the desert and became damp in wet weather. There was a risk of lightning and/or arcing between the power line and the guy wires. The problem was how large did the transmission line conductors and guy wires have to be to withstand the arc while the system went through a controlled shutdown.

While Preece’s Equation was determined experimentally, Onderdonk’s Equation was rigorously derived (Note 2). The equation is quite complicated in its general form but can be simplified if we put in constants for copper and set 20^{o} C as the reference temperature. Under those conditions the equation reduces to three variables, current (I) in Amps, cross-sectional area (A), in mil^{2}, and time (t) in seconds. Using Onderdonk’s Equation to solve for fusing time leads to:

t = 0.0346*(A/I)^{2} [Eq. 3]

This equation is graphed with the black line in Figure 1

Figure 1

Fusing Time vs Current.

Earlier we assumed we had a 15 mil wide, 0.5 Oz PCB trace. We calculated a fusing current of 2.14 Amps for that trace [Eq. 2] using Preece’s Equation. We can calculate an *implied* fusing *time* for that trace by plugging that current and trace area into Onderdonk’s Equation (Equation 3), or simply by locating a current of 2.14 Amps on the Onderdonk curve in Figure 1 (shown by the large black dot.) This suggests that Preece’s approach and Onderdonk’s approach are reasonably consistent, despite the fact that they were developed by totally different means.

**Simulation:** Dr. Adam and I go into great detail in our book about using his software, TRM, (Note 3) to solve PCB trace thermal issues. In Section 12.5 we simulate a fuse using Onderdonk’ conditions with almost perfect results. When we simulate a normal PCB trace (like the one we assumed above) the results differ considerably.

A major assumption in the Preece and Onderdonk equations is that there are no cooling effects — i.e. the conductors continue to heat without any corresponding cooling (dissipation of heat). The Onderdonk derivation assumes that explicitly. Preece’s reporting is silent on that point, but his procedure ignores any cooling impacts as well. In reality, a conductor in still air cools somewhat slowly. So everywhere you see his equation there is an accompanying warning that it is valid for up to 10 seconds or so. But a PCB trace on a dielectric cools much more rapidly, i.e. the thermal conduction of the dielectric is typically much stronger than the convection and radiation cooling effects in air. Therefore, a conductor heats more slowly when current is applied than would be predicted by Onderdonk’s Equation.

Given the trace we assumed above, we can simulate the fusing time for each level of current. The result is the red curve shown in Figure 1. There is very close agreement between the two curves (Onderdonk and the simulation) at very high currents where the fusing time is very short. But the curves quickly separate as the times lengthen. This is because the thermal conduction of the dielectric allows for heat spreading and slows the heating of the trace. Indeed, at some current between 5 and 6 Amps the trace does not reach the melting temperature at all.

Suppose we tried to predict (by simulation) the fusing time of our assumed trace with a 6 Amp current. When we try that, the results are EXTREMELY sensitive to the model assumptions we make, especially regarding trace thickness. Starting just below 7 Amps (and lower) the curve gets VERY steep. For example, the difference in fusing time between 2 seconds and 20 seconds is just a tiny fraction of the current or of the trace area. This limits the precision of simulation for predicting fusing times just to cases where the fusing time will be very short (Note 4). Longer fusing times are subject to too many uncontrollable variables.

**Experimentation:** We benefitted from the support of a board fabricator (Note 5) who gave us numerous boards for experimentation. One such board was suitable for some fusing experiments. There was a trace on that board that was nominally 0.5 Oz. and 15 mils wide, but these dimensions varied slightly across the board (due to normal tolerances.)

Figure 2

Fusing time for experimental trace.

We applied 6 Amps to this trace and measured the voltage across the trace with an oscilloscope (Figure 2, Note 6). The voltage is approximately related to temperature, but there are some lags (including chemical decomposition and board delamination) and non-linearities that occur during an experiment like this. The total time from the start of the current pulse to the moment of fusing, however, is quite precise, and, as shown, was 2.75 seconds. This experimental result is shown by the large red dot in Figure 1.

**Conclusion**: Onderdonk’s and Preece’s Equations, as well as simulations, are useful in a practical sense (on PCB traces) for fusing estimates with very short fusing times, say 0.5 seconds or less. But the impact of conductive cooling through the PCB dielectric becomes a dominant factor slowing down (increasing) the fusing time fairly quickly.

**Caution:** This blog article does not relate to “trace fuses” and we do not endorse the use of “trace fuses” except in very special situations. An overheated or fused trace is a destructive event. Boards where traces have “fused” should be considered as “destroyed” and should not be repaired and/or reused.

**Notes:**

- “PCB Design Guide to Via and Trace Currents and Temperatures,” Douglas Brooks, PhD and Dr. Johannes Adam, Artech House, 2021, Chapters 11, 12 and Appendix G. https://us.artechhouse.com/PCB-Design-Guide-to-Via-and-Trace-Currents-and-Temperatures-P2191.aspx
- Dr. Adam provides a rigorous derivation of Onderdonk’s Equation in Appendix G of our book.
- Thermal Risk Management, see https://www.adam-research.com
- In Section 12.9 of our book we suggest that fusing times less than 0.5 seconds are modestly predictable.
- Prototron Circuits, Inc., Tucson Az.
- Figure 2 is a copy of Figure 12.10 in our book.

Previous article from the same author in Artech House Blog.

]]>__VNA Applications Handbook__ provides the RF/microwave engineer or lab technician with guidelines for performing a wide variety of VNA measurements. Leveraging 60 years of VNA applications experience, Greg and Neil explain the capabilities (and limitations) of modern Vector Network Analyzers in the context of challenging real-world applications. Organized by topic, the busy reader can focus on chapters covering his particular measurement challenge(s). Each chapter provides insights for optimizing test setups and instrument settings, making accurate measurements and, equally important, avoiding costly mistakes. Application topics include linear and non-linear measurements of passive and active devices, frequency converting devices, and special considerations for high-power, high-gain, and pulsed devices. The important topics of Signal Integrity and time-domain reflectometry are covered, as well as emerging applications at millimeter-wave frequencies driven by 5G and automotive radar. Waveguide is presented with emphasis on understanding guided-wave propagation and the associated calculations required for creating calibration standards. Each application is supported by illustrations that help explain key concepts and VNA screenshots are used to show both expected and, in some cases, unexpected results.

For more information or to order, click here.

]]>*Bidirectional Search* has Proved its Reliability not Only with Compact 15-Element Equivalent Circuits but also for Discussed Complex (Quasi-Distributed) Transistor Model Topologies

Regarding model parameter extraction one distinguishes commonly between direct extraction techniques and optimization-based methods.

As an example, the model elements of a widely used 15-element FET model are frequently determined by the direct method. In this case, capacitances, inductances and resistances are extracted from measured S-parameters under different bias conditions; that is, for example, gate forward and cold pinch-off. This method is fast and delivers unambiguous model element values. It is widely accepted for circuit design.

However, this method has its limitations. It is a fact that the model parameters are depending in some way on each other so that the determination in different bias points is basically questionable with respect to their physical relevance. This may become more important when, based on the bias-dependent small-signal equivalent circuit, nonlinear models are designed.

With increasing complexity of equivalent circuits; i.e., for example, modeling of large-size gate periphery power HEMTs with interelectrode capacitive coupling, direct model parameter extraction is no longer feasible, instead optimization approaches are preferred. Several optimization methods are discussed in the book; that is, local, global and hybrid optimizers commenting their pros and cons.

The extraction procedure proposed by F. Lin termed *Bidirectional Search* is described in detail with necessary mathematical background so that interested readers can follow easily and apply this method by their own. The special features of this optimization algorithm can be summarized as follows:

The optimization search space is devided into an extrinsic and intrinsic one, thus reducing the optimization variables for each space. Defining good starting values for the extrinsic parameters, which can be found in different ways (physics-based estimation or low-frequency measurements), the measured S-parameters in the intrinsic reference planes can be calculated by a deembedding procedure. Then, in contrast to classical determination methods, the intrinsic model elements are determined by a least-square method covering the whole frequency range of measurement. This is appropriate because with respect to initial inaccurate extrinsic model parameter values, the single-frequency determined intrinsic model elements would be frequency-dependent. The procedure is iterative; with the new intrinsic model values, S-parameters are calculated and compared with the measured ones. Again, only the extrinsic elements are optimized.

The bidirectional search optimization technique has been proven highly effective for years and is a major element in our complex model parameter extraction strategy using so-called measurement-correlated starting values, which considers the correlation among the parameter elements. It may be interesting to note that the method was also included in the decomposition algorithm proposed by C. van Niekerk et al., “A New Hybrid Multibias Analytical/Decomposition-Based FET Parameter Extraction Algorithm with Intelligent Bias Point Selection,” *IEEE Trans.*, Vol. MTT-51(3), 2003, pp. 893−902. Furthermore, in his doctoral thesis titled *Systematic Optimization Techniques for MESFET Modeling *(Virginia Polytechnic and State University, July 2000), Y. A. Khalaf studied thoroughly the bidirectional search technique. In his thesis the method is well described and was tested on the basis of self-written programming codes. In a short section of our book headlined “Repeatibility and Reproducibility Confirmation Test” Khalaf’s results are summarized, and it is shown that they agree very well with our own experiences.

For more information or to order, click here.

]]>*What are some problems your book can help readers solve?*

- Theoretically understand the difference between vertical and lateral power-semiconductor devices but would like to compare their performances based on reported results.
- Teaches the basics of GaN p-n junctions, including photon recycling; but do not find any books on that topic.
- Explains how to develop GaN and SiC Schottky barrier diodes; extract the effective Richardson constant A* from measured current-voltage characteristics; find A* more than an order of magnitude smaller than the theoretical value; and do not understand why.
- Explores basics of epitaxial growth mechanism to develop the process of next-generation all-epitaxial devices, such as GaN and SiC superjunction devices; but do not find any appropriate textbooks.
- Presents design edge terminations; but find no books describing edge terminations for GaN power devices and a few books describing edge terminations for SiC power devices.

*Please name the audiences at which this book is aimed. How will this audience use your book?*

Practicing engineers in the power electronics: They would use my book as a reference for Industry developing new GaN or SiC power devices.

Professors and graduate students: They would use my book as a textbook for a power device course.

Managers at all levels: They would use my book to make a long-term plan for businesses related to power electronics.

For more information or to order, click here.

]]>Here is the first hint. Assume there is a current that is just large enough to cause the trace to melt (below that, the trace just gets very hot but does not melt.) We call this the *fusing* current. In one case the trace was subjected to a current fractionally larger than the fusing current. In the other case, the trace was subjected to a current substantially larger than the fusing current.

Here is the second hint. Traces subjected to a current fractionally larger than the fusing current can take a relatively long time to melt (minutes to hours). Traces subjected to very large current overloads melt much more quickly (less than a few seconds).

Figure 1 is an illustration of a 15 mil wide, 0.5 Oz. trace subjected to a current of 6.0 Amps, significantly larger than the fusing current. It fused in 2.75 seconds. The moment of fusing was underwhelming. The flash lasted less than 1/30 of a second (one video frame) and there was otherwise little damage to the surrounding area.

Figure 2, on the other hand, is much more spectacular. It illustrates a 20 mil wide, 1.5 Oz. trace subjected to 8.5 Amps (approximately the fusing current). Being 33% wider and 3x thicker, this trace took a long time to melt, approximately 30 minutes. As the trace heated up, it began to visibly glow about 35 seconds before fusing. It began smoking (and ejecting smoke under pressure) some 90 seconds before fusing. The aroma of burning material was in the air for perhaps 15 minutes before fusing. There was substantial damage done to the trace and board along most of its length.

** Heating Dynamics:** A trace heats by I

** Predicting Fusing Time**: So, an interesting question is, can we predict the fusing time for a PCB trace? I. M. Onderdonk developed an equation (Equation 1) bearing his name that may help. Almost nothing is known about Onderdonk, including even his or her gender. The earliest reference to his formula appears to be in 1928, and applies to power line distribution (Note 4). An interesting and potentially valuable characteristic of this formula is that it includes a variable for time (Note 5):

Where:

I = the current in Amps

A = the cross-sectional area in circular mils (Note 6)

S = t = the time in seconds the current is applied

ΔT = the rise in temperature from the ambient or initial state

Ta = the reference temperature in ^{o}C

Onderdonk’s Equation can be rewritten to solve for time, t, as Equation 2:

A very important assumption in Onderdonk’s Equation is that there is no cooling. There is only I^{2}R heating. Brooks and Adam show through many different simulations that there is a time constant associated with trace heating and cooling and that cooling effects take some time to “kick in.” But after the cooling effects do start impacting the trace temperature, fusing times extend out significantly, in some cases indefinitely.

If there is a sudden increase in the current applied to a PCB trace, the cooling effects begin to significantly impact the temperature within about 1.0 to 1.5 seconds. Within about 1.5 seconds, Onderdonk’s Equation can predict PCB trace fusing times pretty accurately. Brooks and Adam show that adjustments to Onderdonk’s Equation can make the equation useful for up to as much as 5.0 seconds. Beyond that, predicting PCB trace fusing times is pretty unreliable.

**Notes:**

- Figures are from a recent book by Douglas G. Brooks, PhD and Dr. Johannes Adam,
__PCB Design Guide to Via and Trace Currents and Temperatures__, Artech House, 2021. See Chapter 12 - For a discussion of these terms, see Note 1, Chapter 4, specifically Section 4.2.
- Traces and board materials are not uniform, and traces do not heat uniformly. Traces will fuse at their weakest spot.
- E. R. Stauffacher, “Short-time Current Carrying Capacity of Copper Wire,” General Electric Review, Vol 31, No 6, June 1928
- No original publications by Onderdonk, including how he derived his formula, are known. Dr. Adam provides a rigorous derivation of Onderdonk’s Equation in the book referenced in Note 1, Appendix G.
- A circular mil is the area of a circle with a diameter of one mil. The formula is A = d
^{2}. The conversion from circular mils to mil^{2}is π/4. Normal conversions are:

1 mil^{2} = 1.273 circular mils

1 circular mil = .7854 mil^{2}

1 m^{2} = 19.736*10^{8} circular mil

1 circular mil = 5.067*10^{-10} m^{2} = 5.067*10^{-4} mm^{2}

**About the authors:**

**Douglas Brooks** has a BS/EE and an MS/EE from Stanford and a PhD from the University of Washington. For the last 20 years he has owned a small engineering service firm and written numerous technical articles on Printed Circuit Board Design and Signal Integrity issues, and has published two books on these topics and one on trace temperatures and currents. He has given seminars several times a year all over the US, as well as Moscow, China, Taiwan, Japan, Canada, and most recently in Tel Aviv. His primary focus is on making complex technical issues easily understood by those without advanced degrees.

**Johannes Adam **received a doctorate in physics from University of Heidelberg, Germany, in 1989 on a thesis about numerical treatment of 3- dimensional radiation transport in moving astrophysical plasmas. He was then employed in software companies, mainly working on numerical simulations of electronics cooling at companies like Cisi Ingenierie S.A. , Flomerics. Ltd. and Mentor Graphics Corp. In 2009 he founded ADAM Research and does work as a technical consultant for electronics developing companies and as a software developer. He is the author of a simulation program called TRM (Thermal Risk Management), designed for electronics developers and PCB designers who want to solve electro-thermal problems at the board level. He is a member of the German chapter of IPC (FED e.V.) and engages in its seminars about thermal topics. He is a Certified Interconnect Designer (CID). He is living in Leimen near Heidelberg.

Click here to order *PCB Design Guide to Via and Trace Currents and Temperature*s.

]]>

Every topic is explained from a theoretical standpoint, simulated, and in many cases supplemented with experimental results. Never before has such a thorough compendium of trace and via heating relationships been available, especially so conveniently.

Virtually every electrical device manufactured in the world has a printed circuit board in it. Printed circuit board designers have lots of things to think about. Typically, the first is just connecting the dots that (inter)connect all the components. Then, how to do so on the minimum number of trace layers. Then, there may be all the signal integrity issues to deal with. And, finally, how do we size the few power traces there are for carrying the required current?

This latter question constitutes only a very small fraction of the total job. But it can be the most mysterious. In part, because there aren’t many reliable guidelines to work from. Then, many of the guidelines that exist are incomplete, contradictory, or, even worse, flat wrong. This book is intended to cover the entire topic of the relationship between PCB trace and via current/temperature relationships. It covers:

- the theory behind the various aspects of the topic,
- the results of simulations based on those theories,
- and, in many cases, summaries of experimental results based on, and confirming, the simulations.

What are some problems your book can help solve?

- How to determine how hot a PCB trace will be carrying a certain amount of current and, equally as important, how will the temperature vary with material, design, and environmental modifications.
- Understanding why is there no relationship between the current through a via and the temperature of the via? The most important and surprising result in the book!
- Understanding why current is relevant in thermal design considerations but current
*density*is not. - Calculating whether an overloaded trace will melt, and if so, how long will it take (and why)?
- Learning if AC currents heat a trace the same way DC currents do, and does the relationship vary with frequency.

What are important Features of your book and the Specific Benefits a buyer can expect to derive from those Features?

Feature: Understand precisely what material and design decisions effect trace temperatures, how, and why.

Benefit: Optimize designs with regard to board area (geography) and layer count.

Feature: Understand that via temperatures are unrelated to current, and that current density is irrelevant.

Benefit: Designs become *much* more efficient and designers can *significantly* reduce the number of vias required, thereby leaving many more routing channels open for traces.

*This is THE most important and surprising feature in the book!*

Feature: A thorough discussion of Onderdonk”s Equation and a rigorous derivation of his/her equation (Appendix D7).

Benefit: It is our belief that this derivation does not exist anywhere else. There is no original work of Onderdonk known to exist. Therefore, senior engineers interested in the subject can see what is effectively a source document.

What audiences will use this book?

Anyone doing PCB design work. PCB designer, engineer, technician, etc.; Circuit design engineer; System design engineer; Project manager; PC board manufacturer

Click here for more information or to order.

]]>In these days where economics are becoming the deciding factor in satellite projects, the business case is key. The book discusses the motivation for the evolution of a new breed of High Throughput Satellites (HTS) that have emerged from the traditional communications satellites. It looks that the commercial sectors and the technical context that have shaped HTS. A theoretical insight into HTS is provided with the intension to highlight the salient requirements that dimension these satellites. A survey of a number of operational GEO HTS systems is provided.

This initial breed of satellites was limited to geostationary satellites, but it is quickly projecting into low earth orbit (LEO) constellations, often referred to as mega-constellations because often they involve thousands of satellites. The industrial and operational facets of LEO constellations are challenging. The characteristics of GEO and LEO systems are not the same and the book provides an understanding of the theoretical aspects that govern LEO systems in order to highlight the respective sweet spots.

With the advent of 5G, HTS systems have the potential of becoming an integral and essential player particularly to support mobility and provide true ubiquity.

- The performance of HTS systems is often not adequately understood and reduced to a single number: capacity. This is often not all sellable which would make the business case optimistic.
- Preliminary dimensioning communication system of a HTS system.
- Preliminary dimensioning of an HTS LEO constellation.
- Understanding the technical, operational and commercial context of HTS systems.
- Understanding the performance of current HTS system.
- Understanding the differences between LEO and GEO HTS systems.

For example, a Feature such as “A new approach to circuit design…,” may Benefit the buyer by “Reducing design time, or solving a typical design problem.”

Feature: Broad/complete overview of HTS

Benefit: Although the subject is vast and it is difficult to be complete, a satellite operator’s view is adopted starting from the commercial and regulatory requirements, working through the system engineering of HTSs.

Feature: Capacity estimation methodology

Benefit: A theoretical methodology is presented for the capacity estimation for both the FORWARD link and RETURN link. The methodology be used for preliminary HTS dimensioning and can be adapted to practical scenarios.

Feature: GEO HTS state of the art

Benefit: A survey of most of the GEO HTS systems in-orbit.

Feature: LEO HTS constellation dimensioning

Benefit: A preliminary approach to constellation dimensioning

Feature: LEO HTS state of the art

Benefit: A survey of the LEO HTS systems that are planned.

Feature: HTS and 5G

Benefit: Update of 5G and the benefits of HTS in the 5G ecosystem.

Feature: GEO vs LEO HTS

Benefit: An analysis highlighted the differences of two systems.

- Advanced system engineers, future system engineers, communication engineers, communication system engineers, communication mission engineers, bid managers, This book provides the foundations for such engineers working in satellite mission definition.
- satellite operators or service providers aiming to define new HTS missions,
- people in the space industry to understand the operators’ requirements and how their technology adds value to the business proposition to operators, payload engineer, bid managers,
- people in service provision and working with satellite operators to define/negotiate their requirements while understanding the technical constraints covering residential broadband delivery, in-flight connectivity and maritime connectivity

- Communication engineers, communication system engineers, advanced system engineer, satellite programme manager, payload engineers This book provides the required elements for such engineers moving to HTS projects. It could be used as a reference.
- Consultants This book provides the background to extend the basic HTS knowledge covering operational, technical etc. It could be used as a reference.
- Undergraduate and post graduate students. This book gives a good basis for an understanding of the theoretical background of HTS system. It also provides information regarding current systems.

Click here for more information or to order.

]]>Here is the first hint. Assume there is a current that is just large enough to cause the trace to melt (below that, the trace just gets very hot but does not melt.) We call this the *fusing* current. In one case the trace was subjected to a current fractionally larger than the fusing current. In the other case, the trace was subjected to a current substantially larger than the fusing current.

Here is the second hint. Traces subjected to a current fractionally larger than the fusing current can take a relatively long time to melt (minutes to hours). Traces subjected to very large current overloads melt much more quickly (less than a few seconds).

Figure 1 – Trace at the moment of fusing.

Figure 2 – Another trace at the moment of fusing.

Figure 1 is an illustration of a 15 mil wide, 0.5 Oz. trace subjected to a current of 6.0 Amps, significantly larger than the fusing current. It fused in 2.75 seconds. The moment of fusing was underwhelming. The flash lasted less than 1/30 of a second (one video frame) and there was otherwise little damage to the surrounding area.

Figure 2, on the other hand, is much more spectacular. It illustrates a 20 mil wide, 1.5 Oz. trace subjected to 8.5 Amps (approximately the fusing current). Being 33% wider and 3x thicker, this trace took a long time to melt, approximately 30 minutes. As the trace heated up, it began to visibly glow about 35 seconds before fusing. It began smoking (and ejecting smoke under pressure) some 90 seconds before fusing. The aroma of burning material was in the air for perhaps 15 minutes before fusing. There was substantial damage done to the trace and board along most of its length.

** Heating Dynamics:** A trace heats by I

** Predicting Fusing Time**: So, an interesting question is, can we predict the fusing time for a PCB trace? I. M. Onderdonk developed an equation (Equation 1) bearing his name that may help. Almost nothing is known about Onderdonk, including even his or her gender. The earliest reference to his formula appears to be in 1928, and applies to power line distribution (Note 4). An interesting and potentially valuable characteristic of this formula is that it includes a variable for time (Note 5):

[1] Where:

I = the current in Amps

A = the cross-sectional area in circular mils (Note 6)

S = t = the time in seconds the current is applied

ΔT = the rise in temperature from the ambient or initial state

Ta = the reference temperature in ^{o}C

Onderdonk’s Equation can be rewritten to solve for time, t, as Equation 2:

[2] A very important assumption in Onderdonk’s Equation is that there is no cooling. There is only I^{2}R heating. Brooks and Adam show through many different simulations that there is a time constant associated with trace heating and cooling and that cooling effects take some time to “kick in.” But after the cooling effects do start impacting the trace temperature, fusing times extend out significantly, in some cases indefinitely.

If there is a sudden increase in the current applied to a PCB trace, the cooling effects begin to significantly impact the temperature within about 1.0 to 1.5 seconds. Within about 1.5 seconds, Onderdonk’s Equation can predict PCB trace fusing times pretty accurately. Brooks and Adam show that adjustments to Onderdonk’s Equation can make the equation useful for up to as much as 5.0 seconds. Beyond that, predicting PCB trace fusing times is pretty unreliable.

**Notes:**

- Figures are from a recent book by Douglas G. Brooks, PhD and Dr. Johannes Adam,
__PCB Design Guide to Via and Trace Currents and Temperatures__, Artech House, 2021. See Chapter 12 - For a discussion of these terms, see Note 1, Chapter 4, specifically Section 4.2.
- Traces and board materials are not uniform, and traces do not heat uniformly. Traces will fuse at their weakest spot.
- E. R. Stauffacher, “Short-time Current Carrying Capacity of Copper Wire,” General Electric Review, Vol 31, No 6, June 1928
- No original publications by Onderdonk, including how he derived his formula, are known. Dr. Adam provides a rigorous derivation of Onderdonk’s Equation in the book referenced in Note 1, Appendix G.
- A circular mil is the area of a circle with a diameter of one mil. The formula is A = d
^{2}. The conversion from circular mils to mil^{2}is π/4. Normal conversions are:

1 mil^{2} = 1.273 circular mils

1 circular mil = .7854 mil^{2}

1 m^{2} = 19.736*10^{8} circular mil

1 circular mil = 5.067*10^{-10} m^{2} = 5.067*10^{-4} mm^{2}

**About the authors:**

**Douglas Brooks** has a BS/EE and an MS/EE from Stanford and a PhD from the University of Washington. For the last 20 years he has owned a small engineering service firm and written numerous technical articles on Printed Circuit Board Design and Signal Integrity issues, and has published two books on these topics and one on trace temperatures and currents. He has given seminars several times a year all over the US, as well as Moscow, China, Taiwan, Japan, Canada, and most recently in Tel Aviv. His primary focus is on making complex technical issues easily understood by those without advanced degrees.

**Johannes Adam **received a doctorate in physics from University of Heidelberg, Germany, in 1989 on a thesis about numerical treatment of 3- dimensional radiation transport in moving astrophysical plasmas. He was then employed in software companies, mainly working on numerical simulations of electronics cooling at companies like Cisi Ingenierie S.A. , Flomerics. Ltd. and Mentor Graphics Corp. In 2009 he founded ADAM Research and does work as a technical consultant for electronics developing companies and as a software developer. He is the author of a simulation program called TRM (Thermal Risk Management), designed for electronics developers and PCB designers who want to solve electro-thermal problems at the board level. He is a member of the German chapter of IPC (FED e.V.) and engages in its seminars about thermal topics. He is a Certified Interconnect Designer (CID). He is living in Leimen near Heidelberg.

Click here for more information or to order.

]]>